Processor Architecture: An Introduction Part II
In Processor Architecture: Part I I left off with a discussion of threads and threading. For this post, I will be dealing with SMP and multi-core technologies.
SMP – Symmetric Multiprocessing. Basically put, multiple CPU’s on one motherboard that share the workload.
Multi-core – More than one CPU residing in a single CPU footprint.
SMP, until recently, was only available in high-end systems. It consisted of 2 or more physical CPU’s on a motherboard and was usually reserved for specific industries and institution’s in which custom software applications (i.e. multi-threaded) could take advantage of more than one processor. An average computer user did not have the budget nor the need for such processing power because commonly used applications such as computer games, word processors and web browsers were not designed to take advantage of more than one processor. SMP enabled motherboards were also very costly when compared to their single-processor counterparts.
With the advent of Intel and AMD’s dual-core and quad-core line of processors, even the average user now has a computer utilizing SMP. The computer I am using to write this post utilizes SMP. If it didn’t, I’m sure the 6-7 applications I usually have open simultaneously would grind to a halt. As dual and quad-core processors become the norm in the average home user’s desktop box, applications which support multiple processors are quickly following. For example, MS Office 2007 utilizes SMP technologies in many ways, specifically in the mathematical calculations that take place within Excel spreadsheets. Operating systems including Windows XP, Vista, Mac OS X, and Linux all support SMP technology. Splitting the calculations over 2 CPU’s cut the time needed to compute complex spreadsheets in half (or more with quad-processor systems).
One downside to all of the processing power is hardware lag. Now that the CPU’s can efficiently handle so many threads, hardware sometimes can’t keep up. Think about trying to get 1000 people out of one exit door in an emergency – the pathway quickly becomes clogged.
That’s all I have the energy for today. Next time, RISC and CISC.
